1. Field of the Invention
The present invention relates generally to information processors, and more particularly, to a data flow type information processor performing an operation by arrival of data and having an information processing portion and a program memory storing a data flow program provided outside thereof.
2. Description of the Related Prior Art
FIG. 1 is a schematic block diagram illustrating a conventional data flow type information processor, and FIG. 2 is a diagram illustrating a part of the content stored in a program memory.
Referring now to FIGS. 1 and 2, a description is made on a structure and a schematic operation of the conventional data flow type information processor. In FIG. 1, a program storing portion 1 includes a program memory (not shown). The program memory stores a data flow program including the content of a destination field (destination information) and instruction information in an input data packet. The program storing portion 1 reads out the destination information and the instruction information by addressing based on the destination information, and stores each of the information in the destination field and the instruction field in the input data packet, for outputting the same.
A paired data detecting portion 2 queues data packets inputted from the program storing portion 1, and stores operand data in one of two data packets having the same destination information in a data field in the other data packet, for outputting the same. An operation processing portion 3 decodes the instruction information in the data packets inputted from the paired data detecting portion 2, performs predetermined operation processing with respect to the two operand data, and stores the result of the operation processing in the data field in the input data packet, for outputting the same to the program storing portion 1.
In the data flow type information processor illustrated in FIG. 1, the data packet circulates through the program storing portion 1, the paired data detecting portion 2, and the operation processing portion 3 in that order, so that operation processing based on a program stored in the program storing portion 1 progresses.
FIG. 3 is a diagram illustrating a schematic structure of the program storing portion illustrated in FIG. 1. In FIG. 3, an input data latching portion 4 holds the present destination information, and the instruction information therein is erased. The input data latching portion 4 also latches operand data. The destination information latched in the input data latching portion 4 is applied to an address calculating portion 5, where an address in a program memory 6 is calculated based on the destination information. The program memory 6 stores a data flow program including destination information and instruction information as shown in FIG. 2. New destination information and instruction information read out from the program memory 6 are applied to an output data latching portion 7, for being latched. The output data latching portion 7 latches the operand data latched in the input data latching portion 4 without any modifications.
In the conventional data flow type information processor illustrated in FIGS. 1 to 3, reading portions of instruction information in programs are all located therein (a portion which has been formed in advance and cannot be increased/eliminated), so that a memory having sufficient capacity to contain all the programs must be provided. However, in general, it is difficult for the information processor to make the capacity of the program memory proper irrespective of whether the memory is structured by a plurality of semiconductor parts or a single LSI (large-scale integrated circuit). As a result the information processor cannot have a flexible hardware structure corresponding to a program to be executed.
The program memory 6 is externally connected to the program storing portion 1, so that the capacity of the program memory 6 is suitably increased or decreased. However, in the data flow type information processor, even if data is applied to the program storing portion 1 from the operation processing portion 3, the data must be processed one by one. Thus, if and when data are sequentially sent from the operation processing portion 3, subsequent data must wait while the first data is processed, so that the waiting time of the data becomes long, whereby the speed of processing becomes slow.